2007年12月26日 星期三
2007年12月11日 星期二
2007年12月4日 星期二
Power Management of Davicom ICs
Power Reduced Mode: PHY Reg. 10H.4
Power Down Mode: PHY Reg. 00H.11 or MAC Reg. 1FH.0
Stop Internal System Clock: MAC Reg. 50H.0
| | System Clock | MAC | PHY | |
| TX | RX | |||
| Power Reduced Mode (PHY Reg. 16.4) | On | On | Off | On |
| Power Down Mode (PHY Reg. 0.11/MAC Reg. 1FH.0) | On | On | Off | Off |
| System Clock Off (MAC Reg. 50H.0) | Off | Off | On | On |
| Power Down Mode (system clock off) | Off | Off | Off | Off |
DM9000 Series Power comparison list
| Item | DM9000 | DM9000A | DM9000B | SMSC LAN9211 | Asix AX88796B |
| Pin counts | 100 | 48 | 48 | 56 | 64 |
| PHY Type | Analog | Analog | DSP | DSP | NA |
| Power Consumption (mW) | | | | | |
| 100Base-TX | 330 | 287.1 | 429 | 514 | 495 |
| 10Base-T | 280.5 | 303.6 | 561 | 578 | 462 |
| 10Base-T (power saving) | NA | NA | 528 | NA | NA |
| 10Base-T Idle | 145.2 | 125.4 | 198 (power saving) | 569 | 448 (power saving) |
| Auto-Negotiation | 198 | 184.8 | 198 | NA | 587 |
| Power Reduce Mode | 66 | 102.3 | NA | NA | NA |
| Power Down Mode | NA | 69.3 | NA | 61 | 140 |
| Power Down Mode (system clock off) | 33 | 23.1 | 66 | 10 | 0.9 |